Browsing by Author "Komalan, Manu"
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Publication CIM-based Robust Logic Accelerator using 28 nm STT-MRAM Characterization Chip Tape-out
Proceedings paper2022, IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) - Intelligent Technology in the Post-Pandemic Era, JUN 13-15, 2022, p.451-454Publication Feasibility exploration of NVM based I-cache through MSHR enhancements
Publication Hier-3D: A Methodology for Physical Hierarchy Exploration of 3-D ICs
Journal article2024, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, (43) 7, p.1957-1970Publication Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices
Journal article2022, ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, (21) 1, p.Art. 3Publication Power, Performance, Area, and Cost Analysis of Face-to-Face-Bonded 3-D ICs
Journal article2023, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, (13) 3, p.300-314Publication System level exploration of resistive-RAM (ReRAM) based hybrid instruction memory organization
Proceedings paper2012, MeAOW workshop at ESWEEK conference, 7/10/2012