Browsing by Author "Lanneer, Dirk"
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Publication A graph-based processor model for retargetable code generation
Proceedings paper1996, European Design and Test Conference - ED&TC 96, 11/03/1996, p.102-107Publication Data Routing: A Paradigm for Efficient Data-Path Synthesis and Code Generation
Proceedings paper1994, 7th ACM/IEEE International Symposium on High Level Synthesis, 18/05/1994, p.17-20Publication Embedded software in real-time signal processing systems: design technologies
Publication Instruction Set Definition and Instruction Selection for ASIPs
Proceedings paper1994, 7th International Symposium on High Level Synthesis, 18/05/1994, p.11-16Publication Integration of medium-throughput signal processing algorithms on flexible instruction-set architectures
Publication Modelling hardware-specific data-types for simulation and compilation in HW/SW co-design
Proceedings paper1996, SASIMI '96 : Synthesis and System Integration of Mixed Technologies, 25/11/1996, p.255-262Publication Processor modeling and code selection for retargetable compilation
Publication Programmable chips in consumer electronics and telecommunications