Browsing by Author "Lee, Y.J."
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Publication An analysis of the reliability of a wafer level package (WLP) using a silicon under the bump (SUB) configuration
Proceedings paper2003, Proceedings of the 53rd Electronic Components and Technology Conference, 27/05/2003, p.858-863Publication Optimization of a silicone under the bump (SUB) structure for wafer level packaging
Proceedings paper2003, Proceedings of the 14th European Microelectronic Packaging Conference and Exhibition - IMAPS Europe, 23/06/2003, p.479-484