Browsing by Author "Lee, Yeong"
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Publication Finite element analysis of an improved wafer level package using silicone under bump (SUB) layers
Proceedings paper2004, EuroSimE: 5th Int. Conf. on Thermal & Mechanical Simulation and Experiments in Micro-Electronics and Micro-Systems, 10/05/2004, p.163-168Publication Photopatternable silicone compositions for electronics packaging applications