Browsing by Author "Lu, Xiaowan"
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Publication Si-passivated Ge nMOS gate stack with low DIT and dipole-induced superior PBTI reliability using 3D-compatible ALD caps and high-pressure anneal
; ; ; ; ; ;Tang, FuJiang, XiaoqiangProceedings paper2016, IEEE International Electron Devices Meeting - IEDM, 3/12/2016, p.834-837