Skip to content
Institutional repository
Communities & Collections
Browse
Site
Log In
imec Publications
Conference contributions
Si-passivated Ge nMOS gate stack with low DIT and dipole-induced superior PBTI reliability using 3D-compatible ALD caps and high-pressure anneal
Publication:
Si-passivated Ge nMOS gate stack with low DIT and dipole-induced superior PBTI reliability using 3D-compatible ALD caps and high-pressure anneal
Date
2016
Proceedings Paper
Simple item page
Full metadata
Statistics
Loading...
Loading...
Files
34400.pdf
370.63 KB
Basic data
APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Arimura, Hiroaki
;
Cott, Daire
;
Loo, Roger
;
Vanherle, Wendy
;
Xie, Qi
;
Tang, Fu
;
Jiang, Xiaoqiang
;
Franco, Jacopo
;
Sioncke, Sonja
;
Ragnarsson, Lars-Ake
;
Chiu, Eddie
;
Lu, Xiaowan
;
Geypen, Jef
;
Bender, Hugo
;
Maes, Jan
;
Givens, Michael
;
Sibaja-Hernandez, Arturo
;
Wostyn, Kurt
;
Boccardi, Guillaume
;
Mitard, Jerome
;
Collaert, Nadine
;
Mocuta, Dan
Journal
Abstract
Description
Metrics
Views
1922
since deposited on 2021-10-23
Acq. date: 2025-10-24
Citations
Metrics
Views
1922
since deposited on 2021-10-23
Acq. date: 2025-10-24
Citations