Browsing by Author "Miranda, Miguel"
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Publication A global bus power optimization methodology for physical design of memory dominated systems by coupling bus segmentation and activity driven block placement
Proceedings paper2004, Proceedings Asia and South Pacific Design Automation Conference - ASP-DAC, 27/01/2004, p.759-761Publication A system-level methodology for fully compensating process variability impact of memory organizations in periodic applications
Proceedings paper2005-09, Proceedings International Conference on HW/SW Codesign and System Synthesis, 18/09/2005, p.117-122Publication Address Equation Multiplexing for Real-Time Signal Processing Applications
Proceedings paper1994, VLSI Signal Processing VII, 26/10/1994, p.188-198Publication ADOPT: Efficient hardware address generation in distributed memory architectures
Proceedings paper1996, 9th International Symposium on System Synthesis - ISSS, 6/11/1996, p.20-25Publication Analysis of high level address code transformations for programmable processors
Proceedings paper2000, Proceedings Design, Automation and Test in Europe Conference and Exhibition, 27/03/2000, p.9-13Publication Architectural and physical design optimizations for efficient intra-tile communication
Proceedings paper2005, Proceedings International Symposium on System-on-Chip, 15/11/2005, p.112-115Publication Architectural exploration and optimization for counter based hardware address generation
Proceedings paper1997, European Design & Test Conference - ED&TC 97, 17/03/1997, p.293-298Publication Background data format exploration for efficient sub-word level program transformations
Proceedings paper2003, Workshop on Compilers and Operating Systems for Low Power - COLP, 27/09/2003Publication Background data format optimization for efficient sub-world parallel program generation
Proceedings paper2003, Program Acceleration through Application and Architecture driven Code Transformations - PA3CT, 22/09/2003, p.75-77Publication Background data management in subword parallelising compilers: a test case
Proceedings paper2005-03, Workshop on Optimizations for DSP and Embedded Systems, 20/03/2005Publication Background data organisation exploration for the low-power implementation in real-time of a digital audio broadcast receiver on a SIMD processor
Proceedings paper2003, Design, Automation and Test in Europe Conference and Exhibition - DATE, 3/03/2003, p.1144-1145Publication Cache conscious data layout organization for conflict miss reduction in embedded multimedia applications
Journal article2005, IEEE Trans. Computers, (54) 1, p.76-81Publication Cache conscious data layout organization for embedded multimedia applications
Proceedings paper2001, Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings; March 2001., p.686-691Publication Case study on energy efficient communication design
Publication Data management for heterogeneous multiprocessor systems
Publication Data reuse analysis technique for software-controlled memory hierarchies
Publication Data transfer and storage exploration for real-time implementation of a digital audio broadcast receiver on a trimedia processor
Proceedings paper2002, Symposium on Integrated Circuit and System Design - SBCCI, 9/09/2002, p.373-378Publication Efficient system exploration and synthesis of applications with dynamic data storage and intensive data transfer
Publication Exploiting data transfer locality in memory mapping
Proceedings paper1999, Proceedings 25th Euromicro Conference; September 1999; Milan, Italy., p.14-21Publication Global interconnect trade-off for technology over memory modules to application level: case study
Proceedings paper2003, 5th ACM/IEEE Intl. Wsh. on System Level Interconnect Prediction, 5/04/2003, p.1-5
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