Browsing by Author "Naeemi, Azad"
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Publication Accurate determination of interlayer resistivity of 2-D layered systems: graphene case study
Journal article2020, IEEE Transactions on Electron Devices, (67) 2, p.627-632Publication Comparison of Photonic to Plasmonic Mode Converters for Plasmonic Multiple-Input Devices
Journal article2024, IEEE PHOTONICS JOURNAL, (16) 2, p.Art. 4800308Publication Evaluation of a Plasmon-Based Optical Integrated Circuit for Error-Tolerant Streaming Applications
;Noor, Samantha Lubaba ;Wu, Xuan; ;van Dorpe, Pol; Reynaert, PatrickJournal article2024, IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS, 10, p.170-177Publication Impact of carrier mobility and lifetime on the potential performance of a plasmonic detector
Proceedings paper2021, Annual Conference of the IEEE-Photonics-Society (IPC), OCT 18-21, 2021Publication Modeling and Optimization of Plasmonic Detectors for Beyond-CMOS Plasmonic Majority Logic Gates
Journal article2020, JOURNAL OF LIGHTWAVE TECHNOLOGY, (38) 18, p.5092-5099Publication Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic
Proceedings paper2020, Design, Automation and Test in Europe Conference and Exhibition (DATE), MAR 09-13, 2020, p.133-138Publication Non-volatile spin-wave majority gate at the nanoscale
Meeting abstract2016, 61st Annual Conference on Magnetism and Magnetic Materials, 31/10/2106Publication Non-volatile spin-wave majority gate at the nanoscale
Journal article2017-02, AIP Advances, (7) 5, p.56020Publication Plasmonic MIM and MSM Waveguide Couplers for Plasmonic Integrated Computing System
Journal article2022, IEEE PHOTONICS JOURNAL, (14) 4, p.4842310Publication Proposal for nanoscale cascaded plasmonic majority gates for non-Boolean computation
Journal article2017, Scientific Reports, 7, p.17866Publication Technology/circuit/system co-optimization and benchmarking for multilayer graphene interconnects at sub-10-nm technology node
Journal article2015, IEEE Transactions on Electron Devices, (62) 5, p.1530-1536Publication Technology/system codesign and benchmarking for lateral and vertical GAA nanowire FETs at 5-nm technology node
Journal article2015, IEEE Transactions on Electron Devices, (62) 10, p.3125-3132