Browsing by Author "Nafus, K."
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Publication Electrical test demonstration for 0.55 NA EUV single patterning damascene process
Proceedings paper2025, IEEE International Interconnect Technology Conference (IITC), 2025-06-02Publication Litho Process Development for Pillars to Enable High Density 4F2 Memory Cells at 34nm Pitch
; ; ; Proceedings paper2023, International Conference on Extreme Ultraviolet Lithography, OCT 02-05, 2023, p.Art. 1275004Publication Moore's Law meets High-NA EUV: Random via patterning for next-generation nodes
Proceedings paper2025, 2025 Conference on Optical and EUV Nanolithography, 2025-04-22, p.1342412-1-1342412-7Publication Patterning process and electrical yield optimization at the limits of single exposure EUV 0.33 NA: a pitch 26nm damascene process
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