Browsing by Author "Raczkowski, Kuba"

50-to-67GHz ESD-protected power amplifiers in digital 45nm LP CMOS

60 GHz low noise amplifiers with 1 kV CDM protection in 40 nm LP CMOS

A +70dBm IIP3 electrical-balance duplexer for highly-integrated tunable front-ends

A +70dBm IIP3 single-ended electrical-balance duplexer in 0.18μm SOI CMOS

A 10-bit, 550-fs step digital-to-time converter in 28nm CMOS

A 42 mW 200 fs-jitter 60 GHz sub-sampling PLL in 40 nm CMOS

A 42mW 230fs-jitter sub-sampling 60GHz PLL in 40nm CMOS

A 42mW wideband baseband receiver section with beamforming functionality for 60GHz applications in 40nm low-power CMOS

A 9.1-12.7 GHz VCO in 28nm CMOS with a bottom-pinning bias technique for digital varactor stress reduction

A 9.2–12.7GHz wideband fractional-N subsampling PLL in 28nm CMOS with 280fs RMS jitter

A 9.2-12.7GHz wideband fractional-N subsampling PLL in 28nm CMOS with 280fs RMS jitter

A digitally-controlled compact 57-66GHz receiver front-end for phased-arrays in 45nm digital CMOS

A DTC-based subsampling PLL capable of self- calibrated fractional synthesis and two-point modulation

A four-path 60GHz phased-array receiver with injection-locked LO, hybrid beamforming and analog baseband section in 90nm CMOS

A Fractional-n subsampling PLL based on a digital-to-time converter

A linear 28nm CMOS digital transmitter with 2x12bit up to LO baseband sampling and -58dBc C-IM3

A self-calibrated 10 Mb/s phase modulator with -37.4 dB EVM based on a 10.1-12.4 GHz, -246.6 dB FoM fractional-N subsampling PLL

A wideband beamformer for a phased-array 60GHz receiver in 40nm digital CMOS

A wideband beamforming lowpass filter for 60GHz phased-array receivers

An adaptive frame image sensor with fine-grained power management for ultra-low power Internet of Things application