Browsing by Author "Steyaert, M."
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Publication A 1.3dB NF CMOS LNA for GPS with 3kV HBM ESD-protection
Proceedings paper2002-09, Proceedings European Solid-State Circuit Conference - ESSCIRC, 23/09/2002, p.335-338Publication A 1.6dB NF CMOS LNA for GPS with 3kV HBM ESD-protection
Proceedings paper2002, Proceedings 24th EOS/ESD Symposium, 6/10/2002, p.18-25Publication A mixed-signal organic 1kHz comparator with low VT sensitivity on flexible plastic substrates
Proceedings paper2009, 35th European Solid-State Circuits Conference - ESSCIRC, 14/09/2009, p.120-123Publication Advanced modeling and parameter extraction of the MOSFET ESD breakdown triggering in the 90nm CMOS node technologies
Proceedings paper2004, Electrical Overstress / Electrostatic Discharge Symposium Proceedings, 19/09/2004, p.2.B.1Publication Co-design methodology to provide high esd protection levels in the advanced rf circuits
; ; ; Leroux, P.Proceedings paper2003-09, Proceedings EOS/ESD Symposium, 21/09/2003, p.195-203Publication Dynamic substrate resistance snapback of ESD protection devices
Proceedings paper2003, Proceedings 41st Annual IEEE International Reliability Physics Symposium, 30/03/2003, p.256-260Publication High ESD performance, low power CMOS LNS for GPS applications
Publication High frequency characterization and modelling of the parasitic RC performance of two terminal ESD CMOS protection devices
Journal article2003, Microelectronics Reliability, (43) 7, p.1011-1020Publication Modeling and extraction of RF-performance parameters of CMOS electrostatic discharge protection devices
Proceedings paper2002, Proceedings 24th EOS/ESD Symposium, 6/10/2002, p.111-118Publication Snapback circuit model for cascaded NMOS ESD over-voltage protection structures