imec Institutional Repository Browsing {{ collection }} by Author "Van Rentergem, Yvan"

Publication

Energy dissipation in reversible logic

De Vos, Alexis

;

Van Rentergem, Yvan

Proceedings paper

2005, International Conference Thermal Problems in Electronics - MICROTHERM, 19/06/2005, p.83-89

Publication

Implementing an arbitrary reversible logic gate

Van Rentergem, Yvan

;

De Vos, Alexis

;

Storme, Leo

Journal article

2005, Journal of Physics A: Mathematical and General, (38) 16, p.3555-3577

Publication

Multiple-valued reversible logic circuits

De Vos, Alexis

;

Van Rentergem, Yvan

Journal article

2009, Journal of Multiple-Valued Logic and Soft Computing, 15, p.489-505

Publication

Optimal design of a reversible full adder

Van Rentergem, Yvan

;

De Vos, Alexis

Journal article

2005, International Journal of Unconventional Computing, (1) 4, p.339-355

Publication

Power consumption in reversible logic addressed by a ramp voltage

De Vos, Alexis

;

Van Rentergem, Yvan

Proceedings paper

2005, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation.15th International Workshop PATMOS, 21/09/2005, p.207-216

Publication

Reversible computing: from mathematical group theory to electronical circuit experiment

De Vos, Alexis

;

Van Rentergem, Yvan

Proceedings paper

2005, Proceedings 1st International Workshop on Reversible Computing, 4/05/2005, p.35-44

Publication

Reversible full adders applying Fredkin gates

Van Rentergem, Yvan

;

De Vos, Alexis

Proceedings paper

2005, Proceedings 12th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES, 22/06/2005, p.179-184

Publication

Synthesis of reversible circuits

De Vos, Alexis

;

Van Rentergem, Yvan

Proceedings paper

2005, Proceedings 14th IEEE/ACM International Workshop on Logic and Synthesis - IWLS, 8/06/2005, p.101-108

Browsing by Author "Van Rentergem, Yvan"