Browsing by Author "Yang, Liu"
- Results per page
- Sort Options
Publication Bottom-up filling of through-silicon vias due to suppressor desorption
Meeting abstract2013, 224th Meeting of the Electrochemical Society, 27/10/2013, p.2067Publication Copper plating uniformity on resistive substrate with segmented anode
Meeting abstract2013, 224th ECS Fall Meeting, 27/10/2013, p.2089Publication Height uniformity of micro-bumps electroplated on thin Cu seed layers
Meeting abstract2016, 229th Electrochemical Society Meeting, 29/05/2016, p.1179Publication Height uniformity of micro-bumps electroplated on thin Cu seed layers
Proceedings paper2016, Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 6, 29/05/2016, p.145-152Publication Modeling the bottom-up filling of through-silicon vias through suppressor adsorption/desorption mechanism
Journal article2013, Journal of the Electrochemical Society, (160) 12, p.D3051-D3056Publication Multi-scale modeling of direct copper plating on resistive non-copper substrates
Journal article2012, Electrochimica Acta, 78, p.524-531Publication Multi-scale modeling of direct copper plating on resistive non-copper substrates
Meeting abstract2012-10, ECS Fall Meeting Symposium E8: Processing Materials of 3D Interconnects, 7/10/2012, p.2738Publication Nucleation and growth kinetics of electrodeposited Ni films on Si(100) surfaces
Journal article2017, Electrochimica Acta, 230, p.407-417Publication Role of oxygen and cuprous ions in copper electroplating
Meeting abstract2013-03, Materials for Advanced Metallization - MAM, 10/03/2013, p.103-104Publication Stochastic modeling of polyethylene glycol as a suppressor in copper electroplating
Journal article2014, Journal of the Electrochemical Society, (161) 5, p.D269-D276Publication The bottom-up copper fill of Ø5μm × 40μm vias using 2-component model
Proceedings paper2012, Processing Materials of 3D Interconnects, Damascene and Electronics Packaging, 9/10/2011, p.53-59Publication The bottom-up copper fill of Ø5μm × 40μm vias using 2-component model chemistry
Meeting abstract2011, 220th ECS Fall Meeting Symposium E5 - Processing Materials of 3D Interconnects, Damascene and Electronics Packaging, 9/10/2011, p.1949Publication The limitation and optimization of bottom-up growth mode in through silicon via electroplating
Journal article2015, Journal of the Electrochemical Society, (162) 14, p.D599-D604Publication Wafer-scale Cu plating uniformity on thin Cu seed layers
Journal article2013, Electrochimica Acta, 104, p.242-248