Browsing by author "Verbauwhede, Ingrid"
Now showing items 1-20 of 65
-
A cautionary note when looking for a truly reconfigurable resistive RAM PUF
Chuang, Kent; Degraeve, Robin; Fantini, Andrea; Groeseneken, Guido; Linten, Dimitri; Verbauwhede, Ingrid (2018) -
A closer look at the delay-chain based TRNG
Grujic, Milos; Rozic, Vladimir; Yang, Bohan; Verbauwhede, Ingrid (2018) -
A compact FPGA-based architecture for elliptic curve cryptography over prime fields
Vliegen, Jo; Mentens, Nele; Genoe, Jan; Braeken, An; Kubera, Serge; Touhafi, Abdellah; Verbauwhede, Ingrid (2010) -
A low-cost implementation of Trivium
Mentens, Nele; Genoe, Jan; Preneel, Bart; Verbauwhede, Ingrid (2008) -
A monolithic SPAD-based random number generator for cryptographic application
Massari, Nicola; Tontini, Alessandro; Parmesan, Luca; Perenzoni, Matteo; Gruijc, Milos; Verbauwhede, Ingrid; Strohm, Thomas; Oshinubi, Dayo; Herrmann, Ingo; Brenneis, Andreas (2022) -
A multi-bits/cell PUF using analog breakdown positions in CMOS
Chuang, Kent; Bury, Erik; Degraeve, Robin; Kaczer, Ben; Kallstenius, Thomas; Groeseneken, Guido; Linten, Dimitri; Verbauwhede, Ingrid (2018) -
A physically unclonable function featuring 0% BER using soft oxide breakdown positions in 40nm CMOS
Chuang, Kent; Bury, Erik; Degraeve, Robin; Kaczer, Ben; Linten, Dimitri; Verbauwhede, Ingrid (2018) -
A physically unclonable function using soft oxide breakdown featuring 0% native BER and 51.8fJ/bit in 40nm CMOS
Chuang, Kent; Bury, Erik; Degraeve, Robin; Kaczer, Ben; Linten, Dimitri; Verbauwhede, Ingrid (2019) -
A quick safari through the reconfiguration jungle
Schaumont, Patrick; Verbauwhede, Ingrid; Keutzer, K.; Sarrafzadeh, M. (2001) -
A Side-Channel-Resistant Implementation of SABER
Van Beirendonck, Michiel; D'anvers, Jan-Pieter; Karmakar, Angshuman; Balasch, Josep; Verbauwhede, Ingrid (2021) -
Atlas: Application confidentiality in compromised embedded systems
Maene, Pieter; Gotzfried, Johannes; Muller, Tibo; De CLerq, Ruan; Freiling, Felix; Verbauwhede, Ingrid (2019) -
Attacking Hardware Random Number Generators in a Multi-Tenant Scenario
Koyen, Yrjo; Peetermans, Adriaan; Rozic, Vladimir; Verbauwhede, Ingrid (2020) -
Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients
Badaroglu, Mustafa; Tiri, Kris; Donnay, Stephane; Wambacq, Piet; Verbauwhede, Ingrid; Gielen, Georges; De Man, Hugo (2002) -
Compact domain-specific co-processor for accelerating module lattice-based KEM
Mera, Jose Maria Bermudo; Turan, Furkan; Karmakar, Angshuman; Roy, Sujoy Sinha; Verbauwhede, Ingrid (2020) -
Comparison of two setups for contactless power measurements for side-channel analysis
Beckers, Arthur; Gierlichs, Benedikt; Balasch, Joseph; Verbauwhede, Ingrid (2018) -
Constant-time discrete Gaussian sampling
Karmakar, Angshuman; Roy, Sujoy Sinha; Reparaz, Oscar; Vercauteren, Frederik; Verbauwhede, Ingrid (2018) -
Design and Analysis of Configurable Ring Oscillators for True Random Number Generation Based on Coherent Sampling
Peetermans, Adriaan; Rozic, Vladimir; Verbauwhede, Ingrid (2021) -
Design and testing methodologies for true random number generators towards industry certification
Balasch, Josep; Bernard, Florent; Fischer, Viktor; Grujic, Milos; Laban, Marek; Petura, Oto; Rozic, Vladimir; Van Battum, Gerard; Verbauwhede, Ingrid; Wakker, Marnix; Yang, Bohan (2018) -
Detection of IEMI fault injection using voltage monitor constructed with fully digital circuit
Fujimoto, Daisuke; Hayashi, Yu-ichi; Beckers, Arthur; Balasch, Josep; Gierlichs, Benedikt; Verbauwhede, Ingrid (2019) -
Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate
Badaroglu, Mustafa; Van der Plas, Geert; Wambacq, Piet; Balasubramanian, Lakshmanan; Tiri, Kris; Verbauwhede, Ingrid; Donnay, Stephane; De Man, Hugo; Gielen, Georges (2004-07)