Browsing by author "Pei, Zhenlin"
Now showing items 1-5 of 5
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Beyond-Cu Intermediate-Length Interconnect Exploration for SRAM Application
Pei, Zhenlin; Catthoor, Francky; Tokei, Zsolt; Pan, Chenyun (2022) -
CFET SRAM With Double-Sided Interconnect Design and DTCO Benchmark
Liu, Hsiao-Hsuan; Schuddinck, Pieter; Pei, Zhenlin; Verschueren, Lynn; Mertens, Hans; Salahuddin, Shairfe Muhammad; Hiblot, Gaspard; Xiang, Yang; Chan, Boon Teik; Subramanian, Sujith; Weckx, Pieter; Hellings, Geert; Garcia Bardon, Marie; Ryckaert, Julien; Pan, Chenyun; Catthoor, Francky (2023) -
Emerging Interconnect Exploration for SRAM Application Using Nonconventional H-Tree and Center-Pin Access
Pei, Zhenlin; Mayahinia, Mahta; Liu, Hsiao-Hsuan; Tahoori, Mehdi; Salahuddin, Shairfe Muhammad; Catthoor, Francky; Tokei, Zsolt; Pan, Chenyun (2023) -
Graphene-Based Interconnect Exploration for Large SRAM Caches for Ultrascaled Technology Nodes
Pei, Zhenlin; Mayahinia, Mahta; Liu, Hsiao-Hsuan; Tahoori, Mehdi; Catthoor, Francky; Tokei, Zsolt; Pan, Chenyun (2023-01-01) -
Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect
Pei, Zhenlin; Mayahinia, Mahta; Liu, Hsiao-Hsuan; Tahoori, Mehdi; Catthoor, Francky; Tokei, Zsolt; Pan, Chenyun (2023)