Browsing by author "Srividya, Vidya"
Now showing items 1-6 of 6
-
Correlation between the Vth-adjustment of nMOSFETs with HfSiO gate oxide and the energy profile of high-k bulk trap density
Sahhaf, Sahar; Degraeve, Robin; Srividya, Vidya; Kaczer, Ben; Gealy, Dan; Horiguchi, Naoto; Togo, Mitsuhiro; Hoffmann, Thomas Y.; Groeseneken, Guido (2010) -
Impact of DRAM process flow on the performance of periphery devices for next generation mobile applications
Spessot, Alessio; Caillat, Christian; Srividya, Vidya; Fazan, Pierre; Schram, Tom; Mitard, Jerome (2011) -
Interpretation of PBTI/ TDDB predicted lifetime based on trap characterization by TSCIS in Vth-adjusted transistors
Sahhaf, Sahar; Degraeve, Robin; Srividya, Vidya; Cho, Moon Ju; Kauerauf, Thomas; Groeseneken, Guido (2010) -
Ion-implantation-based low-cost Hk/MG process for CMOS low-power application
Ortolland, Claude; Sahhaf, Sahar; Srividya, Vidya; Degraeve, Robin; Saino, Kanta; Kim, Chul-Sung; Gilbert, Matthieu; Kauerauf, Thomas; Cho, Moon Ju; Dehan, Morin; Schram, Tom; Togo, Mitsuhiro; Horiguchi, Naoto; Groeseneken, Guido; Biesemans, Serge; Absil, Philippe; Vandervorst, Wilfried; Gealy, Dan; Hoffmann, Thomas Y. (2010) -
Low-power DRAM-compatible replacement gate high-k/metal gate stacks
Ritzenthaler, Romain; Schram, Tom; Bury, Erik; Mitard, Jerome; Ragnarsson, Lars-Ake; Groeseneken, Guido; Horiguchi, Naoto; Thean, Aaron; Spessot, Alessio; Caillat, Christian; Srividya, Vidya; Fazan, Pierre (2012) -
Low-power DRAM-compatible replacement gate high-k/metal gate stacks
Ritzenthaler, Romain; Schram, Tom; Bury, Erik; Spessot, Alessio; Caillat, Christian; Srividya, Vidya; Sebaai, Farid; Mitard, Jerome; Ragnarsson, Lars-Ake; Groeseneken, Guido; Horiguchi, Naoto; Fazan, Pierre; Thean, Aaron (2013)