Browsing by author "Palestri, P."
Now showing items 1-5 of 5
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Characterization of DC performance and low-frequency noise of an array of nMOS Forksheets from 300 K to 4 K
Asanovski, Ruben; Grill, Alexander; Franco, Jacopo; Palestri, P.; Mertens, Hans; Ritzenthaler, Romain; Horiguchi, Naoto; Kaczer, Ben; Selmi, L. (2024) -
Design of ultra-wideband low-noise amplifiers in 45nm CMOS technology: comparison between planar bulk and SOI FinFET devices
Ponton, Davide; Palestri, P.; Esseni, D.; Selmi, L.; Tiebout, M.; Parvais, Bertrand; Siprak, D.; Knoblinger, G. (2009) -
Design strategies for SOI FinFET low-noise amplifiers: dealing with flicker noise
Ponton, Davide; Palestri, P.; Parvais, Bertrand; Fulde, Michael (2009) -
Experimental and physics-based modeling assessment of strain induced mobility enhancement in FinFETs
Serra, N.; Conzatti, F.; Esseni, D.; De Michielis, M.; Palestri, P.; Selmi, L.; Thomas, S.; Whall, T. E.; Parker, E. H. C.; Leadley, D. R.; Witters, Liesbeth; Hikavyy, Andriy; Hytch, M. J.; Houdellier, F.; Snoeck, E.; Wang, T. J.; Lee, W. C.; Vellianitis, Georgios; Van Dal, Mark; Duriez, Blandine; Doornbos, Gerben; Lander, Rob (2009) -
New insights on the excess 1/f noise at cryogenic temperatures in 28 nm CMOS and Ge MOSFETs for quantum computing applications
Asanovski, R.; Grill, Alexander; Franco, Jacopo; Palestri, P.; Beckers, Arnout; Kaczer, Ben; Selmi, L. (2022)