Browsing by author "Jinesh, K."

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Consideration of UFET architecture for the 5nm node and beyond logic transistor

Kumar Das, Uttam; Eneman, Geert; Velampati, Ravi; Chauhan, Y.; Jinesh, K.; Bhattacharya, T. (2018)
Consideration of UFET architecture for the 5nm node and beyond logic transistor

Kumar Das, Utta; Eneman, Geert; Velampati, Ravi; Chauhan, Y.; Jinesh, K.; Bhattacharya, T. (2018)