Browsing by author "Kim, Cheolgyu"
Now showing items 1-3 of 3
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Cost effective FinFET platform for stand alone DRAM 1Y and beyond memory periphery
Spessot, Alessio; Sharan, Neha; Oh, Hyungrock; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Mallik, Arindam; De Keersgieter, An; Parvais, Bertrand; Sherazi, Yasser; Machkaoutsan, Vladimir; Kim, Cheolgyu; Fazan, Pierre; Mocuta, Dan; Mocuta, Anda; Horiguchi, Naoto (2018-01) -
Gate-stack engineered NBTI improvements in high-voltage logic-for-memory high-k/metal gate devices
O'Sullivan, Barry; Ritzenthaler, Romain; Rzepa, G; Wu, Zhicheng; Dentoni Litta, Eugenio; Richard, Olivier; Conard, Thierry; Machkaoutsan, Vladimir; Fazan, Pierre; Kim, Cheolgyu; Franco, Jacopo; Kaczer, Ben; Grasser, T; Spessot, Alessio; Linten, Dimitri; Horiguchi, Naoto (2019) -
Reliability engineering enabling continued logic for memory device scaling
O'Sullivan, Barry; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Simoen, Eddy; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Kim, Cheolgyu; Spessot, Alessio; Linten, Dimitri; Horiguchi, Naoto (2019)