Browsing by author "Sood, Navdeep"
Now showing items 1-3 of 3
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DfT architecture and ATPG for interconnect tests of JEDEC wide-IO DRAM memory-on-Logic 2.5D/3D-stacks
Deutsch, Sergej; Chickermane, Vivek; Keller, Brion; Mukherjee, Subhasish; Sood, Navdeep; Marinissen, Erik Jan (2012-05) -
DfT architecture and ATPG for interconnect tests of JEDEC wide-IO memory-on-logic die stacks
Deutsch, Sergej; Keller, Brion; Chickermane, Vivek; Mukherjee, Subhasish; Sood, Navdeep; Goel, Sandeep K.; Chen, Ji-Jan; Mehta, Ashok; Lee, Frank; Marinissen, Erik Jan (2012-11) -
Interconnect test for wide-IO memory-on-logic stacks
Marinissen, Erik Jan; Deutsch, Sergej; Keller, Brion; Chickermane, Vivek; Mukherjee, Subhashish; Sood, Navdeep (2012-07)