Publication:
DfT architecture and ATPG for interconnect tests of JEDEC wide-IO DRAM memory-on-Logic 2.5D/3D-stacks
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1938 since deposited on 2021-10-20
4last month
Acq. date: 2026-04-06
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Statistics
Views
1938 since deposited on 2021-10-20
4last month
Acq. date: 2026-04-06
Citations