Publication:

DfT architecture and ATPG for interconnect tests of JEDEC wide-IO DRAM memory-on-Logic 2.5D/3D-stacks

Date

Loading...
Thumbnail Image

Abstract

Description

Metrics

Views

1926 since deposited on 2021-10-20
Acq. date: 2025-10-23

Citations

Metrics

Views

1926 since deposited on 2021-10-20
Acq. date: 2025-10-23

Citations