Browsing by author "Waite, Andrew"
Now showing items 1-2 of 2
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A comparison of arsenic and phosphorus extension by room temperature and hot ion implantation for NMOS Si bulk-FinFET at N7 (7nm) technology relevant fin dimensions
Sasaki, Yuichiro; Ritzenthaler, Romain; De Keersgieter, An; Chiarella, Thomas; Kubicek, Stefan; Rosseel, Erik; Waite, Andrew; del Agua Borniquel, Jose Ignacio; Colombeau, Benjamin; Chew, Soon Aik; Kim, Min-Soo; Schram, Tom; Demuynck, Steven; Vandervorst, Wilfried; Horiguchi, Naoto; Mocuta, Dan; Mocuta, Anda; Thean, Aaron (2015-06) -
Improvement in drain-induced-barrier-lowering and on-state current characteristics of bulk Si fin field-effect-transistors using high temperature phosphorus extension ion implantation
Kikuchi, Yoshiaki; Hopf, Toby; Mannaert, Geert; Everaert, Jean-Luc; Kubicek, Stefan; Eyben, Pierre; Waite, Andrew; Borniquel, Jose; Variam, Naushad; Mocuta, Dan; Horiguchi, Naoto (2019)