Browsing by author "Hyun, S."

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A 50nm high-k poly silicon gate stack with a buried SiGe channel

Jakschik, S.; Hoffmann, Thomas Y.; Cho, Hag-Ju; Veloso, Anabela; Loo, Roger; Hyun, S.; Sorada, H.; Inoue, A.; de Potter de ten Broeck, Muriel; Eneman, Geert; Severi, Simone; Absil, Philippe; Biesemans, Serge (2007)
Threshold voltage control in PMOSFETs with polysilicon or fully-Silicided gates on Hf-based gate dielectric using controlled lateral oxidation

Kaushik, Vidya; Rohr, Erika; Hyun, S.; De Gendt, Stefan; Van Elshocht, Sven; Delabie, Annelies; Everaert, Jean-Luc; Veloso, Anabela; Brus, Stephan; Ragnarsson, Lars-Ake; Richard, Olivier; Caymax, Matty; Heyns, Marc (2005)