Publication:

Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7

Date

2017
Proceedings Paper
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dc.contributor.authorGupta, Mohit
dc.contributor.authorWeckx, Pieter
dc.contributor.authorCosemans, Stefan
dc.contributor.authorSchuddinck, Pieter
dc.contributor.authorBaert, Rogier
dc.contributor.authorYakimets, Dmitry
dc.contributor.authorJang, Doyoung
dc.contributor.authorSherazi, Yasser
dc.contributor.authorRaghavan, Praveen
dc.contributor.authorSpessot, Alessio
dc.contributor.authorMocuta, Anda
dc.contributor.authorDehaene, Wim
dc.contributor.imecauthorGupta, Mohit
dc.contributor.imecauthorWeckx, Pieter
dc.contributor.imecauthorCosemans, Stefan
dc.contributor.imecauthorSchuddinck, Pieter
dc.contributor.imecauthorBaert, Rogier
dc.contributor.imecauthorYakimets, Dmitry
dc.contributor.imecauthorJang, Doyoung
dc.contributor.imecauthorSherazi, Yasser
dc.contributor.imecauthorSpessot, Alessio
dc.contributor.imecauthorDehaene, Wim
dc.contributor.orcidimecGupta, Mohit::0000-0002-1924-1264
dc.date.accessioned2021-10-24T05:19:28Z
dc.date.available2021-10-24T05:19:28Z
dc.date.embargo9999-12-31
dc.date.issued2017
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/28439
dc.identifier.urlhttp://ieeexplore.ieee.org/document/8066640/
dc.source.beginpage256
dc.source.conference47th European Solid-State Device Research Conference - ESSDERC
dc.source.conferencedate11/09/2017
dc.source.conferencelocationLeuven Belgium
dc.source.endpage259
dc.title

Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7

dc.typeProceedings paper
dspace.entity.typePublication
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