A 1.7mW 11b 250MS/s 2-times interleaved fully dynamic pipelined SAR ADC in 40nm digital CMOS

cris.virtual.department	#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid	0000-0002-3980-0203
cris.virtualsource.department	32d8e58a-5716-42c1-8c08-46738850ae45
cris.virtualsource.orcid	32d8e58a-5716-42c1-8c08-46738850ae45
dc.contributor.author	Verbruggen, Bob
dc.contributor.author	Iriguchi, Masao
dc.contributor.author	Craninckx, Jan
dc.contributor.imecauthor	Craninckx, Jan
dc.contributor.orcidimec	Craninckx, Jan::0000-0002-3980-0203
dc.date.accessioned	2021-10-20T18:17:29Z
dc.date.available	2021-10-20T18:17:29Z
dc.date.embargo	9999-12-31
dc.date.issued	2012
dc.identifier.issn	0018-9200
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/21770
dc.source.beginpage	2880
dc.source.endpage	2887
dc.source.issue	12
dc.source.journal	IEEE Journal of Solid-State Circuits
dc.source.volume	47
dc.title	A 1.7mW 11b 250MS/s 2-times interleaved fully dynamic pipelined SAR ADC in 40nm digital CMOS
dc.type	Journal article
dspace.entity.type	Publication
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