Publication:
A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, ultra low leakage power memory using dynamic cell stability and a dual swing data link
Date
| dc.contributor.author | Rooseleer, Bram | |
| dc.contributor.author | Cosemans, Stefan | |
| dc.contributor.author | Dehaene, Wim | |
| dc.contributor.imecauthor | Rooseleer, Bram | |
| dc.contributor.imecauthor | Cosemans, Stefan | |
| dc.contributor.imecauthor | Dehaene, Wim | |
| dc.date.accessioned | 2021-10-20T15:29:43Z | |
| dc.date.available | 2021-10-20T15:29:43Z | |
| dc.date.embargo | 9999-12-31 | |
| dc.date.issued | 2012 | |
| dc.identifier.issn | 0018-9200 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/21426 | |
| dc.source.beginpage | 1784 | |
| dc.source.endpage | 1796 | |
| dc.source.issue | 7 | |
| dc.source.journal | IEEE Journal of Solid-State Circuits | |
| dc.source.volume | 47 | |
| dc.title | A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, ultra low leakage power memory using dynamic cell stability and a dual swing data link | |
| dc.type | Journal article | |
| dspace.entity.type | Publication | |
| Files | Original bundle
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