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Investigation of TSV noise coupling in 3D-ICs using an experimental validated 3D TSV circuit model including Si substrate effects and TSV capacitance inversion behavior after wafer thinning

Date

2016
Proceedings Paper
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dc.contributor.authorSun, Xiao
dc.contributor.authorRack, Martin
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorStucchi, Michele
dc.contributor.authorDe Vos, Joeri
dc.contributor.authorAbsil, Philippe
dc.contributor.authorRaskin, J.P.
dc.contributor.authorBeyne, Eric
dc.contributor.imecauthorSun, Xiao
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.imecauthorStucchi, Michele
dc.contributor.imecauthorDe Vos, Joeri
dc.contributor.imecauthorAbsil, Philippe
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.contributor.orcidimecDe Vos, Joeri::0000-0002-9332-9336
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.date.accessioned2021-10-23T15:20:36Z
dc.date.available2021-10-23T15:20:36Z
dc.date.issued2016
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/27365
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7540397
dc.source.beginpage1
dc.source.conferenceIEEE MTT-S International Microwave Symposium - IMS
dc.source.conferencedate22/05/2016
dc.source.conferencelocationSan Francisco, CA USA
dc.source.endpage4
dc.title

Investigation of TSV noise coupling in 3D-ICs using an experimental validated 3D TSV circuit model including Si substrate effects and TSV capacitance inversion behavior after wafer thinning

dc.typeProceedings paper
dspace.entity.typePublication
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