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Maximizing the throughput of threshold-protected AES-GCM implementations on FPGA

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dc.contributor.authorVliegen, Jo
dc.contributor.authorReparaz, Oscar
dc.contributor.authorMentens, Nele
dc.contributor.imecauthorMentens, Nele
dc.date.accessioned2021-10-24T18:17:23Z
dc.date.available2021-10-24T18:17:23Z
dc.date.embargo9999-12-31
dc.date.issued2017
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/29878
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8031559
dc.source.conferenceIEEE 2nd International Verification and Security Workshop - IVSW
dc.source.conferencedate3/07/2017
dc.source.conferencelocationThessaloniki Greece
dc.title

Maximizing the throughput of threshold-protected AES-GCM implementations on FPGA

dc.typeProceedings paper
dspace.entity.typePublication
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