Publication:

Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect

Date

2023
Proceedings Paper
https://doi.org/10.1145/3583781.3590311
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dc.contributor.authorPei, Zhenlin
dc.contributor.authorMayahinia, Mahta
dc.contributor.authorLiu, Hsiao-Hsuan
dc.contributor.authorTahoori, Mehdi
dc.contributor.authorCatthoor, Francky
dc.contributor.authorTokei, Zsolt
dc.contributor.authorPan, Chenyun
dc.contributor.imecauthorLiu, Hsiao-Hsuan
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.imecauthorTokei, Zsolt
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.contributor.orcidimecTokei, Zsolt::0000-0003-3545-3424
dc.date.accessioned2023-11-30T08:13:25Z
dc.date.available2023-08-24T17:41:50Z
dc.date.available2023-08-29T07:46:57Z
dc.date.available2023-11-30T08:13:25Z
dc.date.embargo2023-07-30
dc.date.issued2023
dc.description.wosFundingTextThis work was partially funded by IMEC, the Department of Energy (DoE) under Award DE-SC0022881, and in part by the National Science Foundation (NSF) under Grant CCF-2219753.
dc.identifier.doi10.1145/3583781.3590311
dc.identifier.eisbn979-8-4007-0125-2
dc.identifier.issnna
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/42394
dc.publisherASSOC COMPUTING MACHINERY
dc.source.beginpage159
dc.source.conference33rd Great Lakes Symposium on VLSI (GLSVLSI)
dc.source.conferencedateJUN 05-07, 2023
dc.source.conferencelocationKnoxville
dc.source.endpage162
dc.source.journalnot applicable
dc.source.numberofpages4
dc.subject.keywordsTechnology/Memory Co-Design
dc.subject.keywordsE-Tree Interconnect
dc.title

Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect

dc.typeProceedings paper
dspace.entity.typePublication
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