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On the efficiency of stress techniques in gate-last n-type bulk finfets

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dc.contributor.authorEneman, Geert
dc.contributor.authorCollaert, Nadine
dc.contributor.authorVeloso, Anabela
dc.contributor.authorDe Keersgieter, An
dc.contributor.authorDe Meyer, Kristin
dc.contributor.authorHoffmann, Thomas Y.
dc.contributor.imecauthorEneman, Geert
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorVeloso, Anabela
dc.contributor.imecauthorDe Keersgieter, An
dc.contributor.imecauthorDe Meyer, Kristin
dc.contributor.orcidimecEneman, Geert::0000-0002-5849-3384
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.contributor.orcidimecDe Keersgieter, An::0000-0002-5527-8582
dc.date.accessioned2021-10-19T13:26:16Z
dc.date.available2021-10-19T13:26:16Z
dc.date.issued2011
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/18886
dc.source.beginpage115
dc.source.conference41st European Solid-State Device Research Conference - ESSDERC
dc.source.conferencedate12/09/2011
dc.source.conferencelocationHelsinki Finland
dc.source.endpage118
dc.title

On the efficiency of stress techniques in gate-last n-type bulk finfets

dc.typeProceedings paper
dspace.entity.typePublication
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