Publication:

Use of SSTA tools for evaluating BTI impact on combinational circuits

Date

2014
Journal article
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cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0003-3763-2098
cris.virtual.orcid0000-0002-1484-4007
cris.virtualsource.department2fcc3f32-b96b-4ece-a34c-e0dd87c237c9
cris.virtualsource.department812f2909-a81b-4593-9b32-75331cffa35c
cris.virtualsource.orcid2fcc3f32-b96b-4ece-a34c-e0dd87c237c9
cris.virtualsource.orcid812f2909-a81b-4593-9b32-75331cffa35c
dc.contributor.authorCamargo, V. V. A.
dc.contributor.authorKaczer, Ben
dc.contributor.authorWirth, G.
dc.contributor.authorGrasser, T.
dc.contributor.authorGroeseneken, Guido
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.date.accessioned2021-10-22T00:51:41Z
dc.date.available2021-10-22T00:51:41Z
dc.date.embargo9999-12-31
dc.date.issued2014
dc.identifier.issn1063-8210
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/23602
dc.identifier.urlhttp://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6466436&tag=1
dc.source.beginpage280
dc.source.endpage285
dc.source.issue2
dc.source.journalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
dc.source.volume22
dc.title

Use of SSTA tools for evaluating BTI impact on combinational circuits

dc.typeJournal article
dspace.entity.typePublication
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