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Factors involved in performance optimisation of GHz chip-package co-design

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dc.contributor.authorChandrasekhar, Arun
dc.contributor.authorBrebels, Steven
dc.contributor.authorRottenberg, Xavier
dc.contributor.authorVandevelde, Bart
dc.contributor.authorDriessens, Evelien
dc.contributor.authorBalachandran, Jayaprakash
dc.contributor.authorBeyne, Eric
dc.contributor.authorDe Raedt, Walter
dc.contributor.authorNauwelaers, Bart
dc.contributor.authorMertens, Robert
dc.contributor.imecauthorBrebels, Steven
dc.contributor.imecauthorRottenberg, Xavier
dc.contributor.imecauthorVandevelde, Bart
dc.contributor.imecauthorBeyne, Eric
dc.contributor.imecauthorDe Raedt, Walter
dc.contributor.imecauthorNauwelaers, Bart
dc.contributor.imecauthorMertens, Robert
dc.contributor.orcidimecBrebels, Steven::0000-0002-1568-0286
dc.contributor.orcidimecVandevelde, Bart::0000-0002-6753-6438
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.contributor.orcidimecDe Raedt, Walter::0000-0002-7117-7976
dc.date.accessioned2021-10-15T12:50:54Z
dc.date.available2021-10-15T12:50:54Z
dc.date.issued2004-11
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/8670
dc.source.conferenceProceedings 37th IMAPS International Symposium on Microelectronics
dc.source.conferencedate14/11/2004
dc.source.conferencelocationLong Beach, CA USA
dc.title

Factors involved in performance optimisation of GHz chip-package co-design

dc.typeProceedings paper
dspace.entity.typePublication
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