Publication:
Mapping an H.264/AVC decoder onto the ADRES reconfigurable architecture
Date
| dc.contributor.author | Mei, Bingfeng | |
| dc.contributor.author | Veredas, Francisco-Javier | |
| dc.contributor.author | Masschelein, Bart | |
| dc.contributor.imecauthor | Masschelein, Bart | |
| dc.contributor.orcidimec | Masschelein, Bart::0000-0002-5636-1185 | |
| dc.date.accessioned | 2021-10-16T03:23:32Z | |
| dc.date.available | 2021-10-16T03:23:32Z | |
| dc.date.issued | 2005 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/10877 | |
| dc.source.beginpage | 622 | |
| dc.source.conference | Proceedings International Conference on Field Programmable Logic and Applications - FPL | |
| dc.source.conferencedate | 24/08/2005 | |
| dc.source.conferencelocation | Tampere Finland | |
| dc.source.endpage | 625 | |
| dc.title | Mapping an H.264/AVC decoder onto the ADRES reconfigurable architecture | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
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