Publication:

Memory Hierarchy Calibration Based on Real Hardware In-order Cores for Accurate Simulation

Date

2021
Proceedings Paper
https://doi.org/10.23919/DATE51398.2021.9474108
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dc.contributor.authorHuppert, Quentin
dc.contributor.authorEvenblij, Timon
dc.contributor.authorPerumkunnil, Manu
dc.contributor.authorCatthoor, Francky
dc.contributor.authorTorres, Lionel
dc.contributor.authorNovo, David
dc.contributor.imecauthorEvenblij, Timon
dc.contributor.imecauthorPerumkunnil, Manu
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecEvenblij, Timon::0000-0002-5337-0617
dc.contributor.orcidimecPerumkunnil, Manu::0000-0002-0029-6548
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.date.accessioned2022-08-26T09:06:00Z
dc.date.available2022-07-18T02:27:52Z
dc.date.available2022-07-20T11:27:27Z
dc.date.available2022-08-26T09:06:00Z
dc.date.issued2021
dc.identifier.doihttps://doi.org/10.23919/DATE51398.2021.9474108
dc.identifier.eisbn978-3-9819263-5-4
dc.identifier.isbn978-1-7281-6336-9
dc.identifier.issn1558-1101
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/40137
dc.publisherIEEE
dc.source.conferenceDesign, Automation and Test in Europe Conference and Exhibition (DATE)
dc.source.conferencedateFEB 01-05, 2021
dc.source.conferencelocationGrenoble, France
dc.source.journal/
dc.source.numberofpages4
dc.subject.disciplineComputer science/information technology
dc.subject.keywordscomputer system simulation
dc.subject.keywordsmemory hierarchy
dc.title

Memory Hierarchy Calibration Based on Real Hardware In-order Cores for Accurate Simulation

dc.typeProceedings paper
dspace.entity.typePublication
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