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Charge Transport in GaN High Electron Mobility Transistor With Positive Substrate Bias

 
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
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cris.virtual.orcid0000-0002-2831-0719
cris.virtual.orcid0000-0003-4392-1777
cris.virtual.orcid0000-0001-6632-6239
cris.virtualsource.department8ec92196-e614-4f8c-b405-11eed8c41ef7
cris.virtualsource.departmentdc976311-c8c1-48f6-9557-3dbf30966b9e
cris.virtualsource.departmenta1ba6cc5-b3a9-4b31-8f64-a47cbd839f9c
cris.virtualsource.orcid8ec92196-e614-4f8c-b405-11eed8c41ef7
cris.virtualsource.orciddc976311-c8c1-48f6-9557-3dbf30966b9e
cris.virtualsource.orcida1ba6cc5-b3a9-4b31-8f64-a47cbd839f9c
dc.contributor.authorHuang, Peng
dc.contributor.authorSmith, Matthew
dc.contributor.authorUren, Michael
dc.contributor.authorChen, Zequan
dc.contributor.authorBakeroot, Benoit
dc.contributor.authorVohra, Anurag
dc.contributor.authorDecoutere, Stefaan
dc.contributor.authorKuball, Martin
dc.contributor.imecauthorBakeroot, Benoit
dc.contributor.imecauthorVohra, Anurag
dc.contributor.imecauthorDecoutere, Stefaan
dc.contributor.orcidimecBakeroot, Benoit::0000-0003-4392-1777
dc.contributor.orcidimecVohra, Anurag::0000-0002-2831-0719
dc.contributor.orcidimecDecoutere, Stefaan::0000-0001-6632-6239
dc.date.accessioned2025-06-13T04:52:40Z
dc.date.available2025-06-13T04:52:40Z
dc.date.issued2025
dc.description.abstractAbstract: Charge transport in 650-V-rated GaN high electron mobility transistors (HEMTs) was investigated using positive substrate bias up to +600 V. Positive substrate bias resulted in a reduction in channel current, attributed to negative charge storage in the buffer, resulting in up to a >50% reduction in the 2-D electron gas (2DEG) channel density. The dynamics of the accumulated charge was investigated using recovery transients after substrate bias stress, with recovery times >1000 s for substrate stress bias >+200 V. The recovery time was reduced significantly with the application of a negative substrate bias of short duration, immediately following the positive substrate bias stress. A comprehensive explanation is presented, which requires a detailed understanding of the transport (both ohmic and non-ohmic) through each of the layers in the epitaxial stack.
dc.description.wosFundingTextThis work was supported in part by the Engineering and Physical Sciences Research Council (EPSRC) under Grant EP/R029393/1 and in part by the U.K. Research and Innovation (UKRI) Innovation and Knowledge Centre Transforming Net Zero with Ultrawide Bandgap Semiconductor Device Technology (REWIRE) under Grant EP/Z531091/1.
dc.identifier.doi10.1109/TED.2025.3571004
dc.identifier.issn0018-9383
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/45797
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.source.beginpage3483
dc.source.endpage3488
dc.source.issue7
dc.source.journalIEEE TRANSACTIONS ON ELECTRON DEVICES
dc.source.numberofpages6
dc.source.volume72
dc.title

Charge Transport in GaN High Electron Mobility Transistor With Positive Substrate Bias

dc.typeJournal article
dspace.entity.typePublication
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