IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
Abstract
Post-metallization annealing (PMA) offers significant resistivity improvements for molybdenum word lines (WLs) in 3D NAND Flash, but its impact on device reliability remains unclear. This work systematically evaluates PMA effects using planar capacitors designed for high-temperature processing, comparing Mo deposited by PVD and ALD on PECVD and PEALD SiO2 under H2 ( 650 ∘ C) and N2 ( 750 ∘ C) annealing. Our electrical characterization reveals trap-assisted Fowler-Nordheim tunneling as the dominant conduction mechanism, with barrier heights significantly influenced by annealing conditions in PEALD SiO2. Time-dependent dielectric breakdown (TDDB) measurements at elevated temperatures confirm that no metal drift occurs even after high-temperature annealing. Failure is caused by a field-driven intrinsic dielectric breakdown, with no evidence of Mo-induced degradation. H2 annealing provides an optimal balance between resistivity improvement and interface quality. These findings establish a pathway for implementing barrierless Mo metallization in sub-30nm z-pitch 3D NAND devices, enabling further vertical scaling while maintaining reliability requirements for both programming and reading operations.