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Towards 10000TOPS/W DNN inference with analog in-memory computing – A circuit blueprint, device options and requirements

Date

2019
Proceedings Paper
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dc.contributor.authorCosemans, Stefan
dc.contributor.authorVerhoef, Bram
dc.contributor.authorDoevenspeck, Jonas
dc.contributor.authorPapistas, Ioannis
dc.contributor.authorCatthoor, Francky
dc.contributor.authorDebacker, Peter
dc.contributor.authorMallik, Arindam
dc.contributor.authorVerkest, Diederik
dc.contributor.imecauthorCosemans, Stefan
dc.contributor.imecauthorVerhoef, Bram
dc.contributor.imecauthorDoevenspeck, Jonas
dc.contributor.imecauthorPapistas, Ioannis
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.imecauthorDebacker, Peter
dc.contributor.imecauthorMallik, Arindam
dc.contributor.imecauthorVerkest, Diederik
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.contributor.orcidimecDebacker, Peter::0000-0003-3825-5554
dc.contributor.orcidimecMallik, Arindam::0000-0002-0742-9366
dc.contributor.orcidimecVerkest, Diederik::0000-0001-6567-2746
dc.date.accessioned2021-10-27T08:13:21Z
dc.date.available2021-10-27T08:13:21Z
dc.date.embargo9999-12-31
dc.date.issued2019
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/32755
dc.source.beginpage518
dc.source.conferenceIEEE International Electron Devices Meeting - IEDM
dc.source.conferencedate7/12/2019
dc.source.conferencelocationSan Francisco, CA USA
dc.source.endpage521
dc.title

Towards 10000TOPS/W DNN inference with analog in-memory computing – A circuit blueprint, device options and requirements

dc.typeProceedings paper
dspace.entity.typePublication
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