Publication:

Top-pinned STT-MRAM devices with high thermal stability hybrid free layers for high density memory applications

Date

2018
Journal article
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dc.contributor.authorLiu, Enlong
dc.contributor.authorSwerts, Johan
dc.contributor.authorWu, Jackson
dc.contributor.authorVaysset, Adrien
dc.contributor.authorCouet, Sebastien
dc.contributor.authorMertens, Sofie
dc.contributor.authorRao, Siddharth
dc.contributor.authorKim, Woojin
dc.contributor.authorVan Elshocht, Sven
dc.contributor.authorDe Boeck, Jo
dc.contributor.authorKar, Gouri Sankar
dc.contributor.imecauthorSwerts, Johan
dc.contributor.imecauthorWu, Jackson
dc.contributor.imecauthorCouet, Sebastien
dc.contributor.imecauthorMertens, Sofie
dc.contributor.imecauthorRao, Siddharth
dc.contributor.imecauthorKim, Woojin
dc.contributor.imecauthorVan Elshocht, Sven
dc.contributor.imecauthorDe Boeck, Jo
dc.contributor.imecauthorKar, Gouri Sankar
dc.contributor.orcidimecCouet, Sebastien::0000-0001-6436-9593
dc.contributor.orcidimecMertens, Sofie::0000-0002-1482-6730
dc.contributor.orcidimecRao, Siddharth::0000-0001-6161-3052
dc.contributor.orcidimecVan Elshocht, Sven::0000-0002-6512-1909
dc.date.accessioned2021-10-25T22:15:10Z
dc.date.available2021-10-25T22:15:10Z
dc.date.embargo9999-12-31
dc.date.issued2018
dc.identifier.issn0018-9464
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/31205
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8369397/
dc.source.beginpage3401805
dc.source.issue11
dc.source.journalIEEE Transactions on Magnetics
dc.source.volume54
dc.title

Top-pinned STT-MRAM devices with high thermal stability hybrid free layers for high density memory applications

dc.typeJournal article
dspace.entity.typePublication
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