Publication:
Probing complexities of 3D-stacked ICs – A test engineers' perspective
Date
| dc.contributor.author | Fodor, Ferenc | |
| dc.contributor.author | De Wachter, Bart | |
| dc.contributor.author | Podpod, Arnita | |
| dc.contributor.author | Stucchi, Michele | |
| dc.contributor.author | Marinissen, Erik Jan | |
| dc.contributor.imecauthor | Fodor, Ferenc | |
| dc.contributor.imecauthor | De Wachter, Bart | |
| dc.contributor.imecauthor | Podpod, Arnita | |
| dc.contributor.imecauthor | Stucchi, Michele | |
| dc.contributor.imecauthor | Marinissen, Erik Jan | |
| dc.contributor.orcidimec | Marinissen, Erik Jan::0000-0002-5058-8303 | |
| dc.date.accessioned | 2021-10-28T21:42:21Z | |
| dc.date.available | 2021-10-28T21:42:21Z | |
| dc.date.issued | 2020-11 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/35127 | |
| dc.identifier.url | https://pld.ttu.ee/3dtest20/index.php?page=45 | |
| dc.source.beginpage | 98 | |
| dc.source.conference | 7th IEEE International Workshop on Testing Three-Dimensional, Chiplet-Based, and Stacked ICs (3DC-TEST) | |
| dc.source.conferencedate | 5/11/2020 | |
| dc.source.conferencelocation | Washington, DC USA | |
| dc.source.endpage | 128 | |
| dc.title | Probing complexities of 3D-stacked ICs – A test engineers' perspective | |
| dc.type | Meeting abstract | |
| dspace.entity.type | Publication | |
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