Publication:
Optimized algorithms and architectures for fast non-cryptographic hash functions in hardware
| dc.contributor.author | Sateesan, Arish | |
| dc.contributor.author | Biesmans, Jelle | |
| dc.contributor.author | Claesen, Thomas | |
| dc.contributor.author | Vliegen, Jo | |
| dc.contributor.author | Mentens, Nele | |
| dc.date.accessioned | 2023-06-29T14:13:21Z | |
| dc.date.available | 2023-03-29T03:54:08Z | |
| dc.date.available | 2023-06-29T14:13:21Z | |
| dc.date.issued | 2023 | |
| dc.description.wosFundingText | This work is supported by the ESCALATE project, funded by FWO, Belgium (G0E0719N) and SNSF, Switzerland (200021L_182005) , and by Cybersecurity Research Flanders, Belgium (VR20192203) . | |
| dc.identifier.doi | 10.1016/j.micpro.2023.104782 | |
| dc.identifier.issn | 0141-9331 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/41401 | |
| dc.publisher | ELSEVIER | |
| dc.source.beginpage | Art.: 104782 | |
| dc.source.endpage | na | |
| dc.source.issue | April | |
| dc.source.journal | MICROPROCESSORS AND MICROSYSTEMS | |
| dc.source.numberofpages | 11 | |
| dc.source.volume | 98 | |
| dc.subject.keywords | PERFORMANCE | |
| dc.title | Optimized algorithms and architectures for fast non-cryptographic hash functions in hardware | |
| dc.type | Journal article | |
| dspace.entity.type | Publication | |
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