Publication:
Capacitance reduction technique for through silicon via (TSV) in p-Si substrate
Date
| dc.contributor.author | Katti, Guruprasad | |
| dc.contributor.author | Stucchi, Michele | |
| dc.contributor.author | De Meyer, Kristin | |
| dc.contributor.author | Dehaene, Wim | |
| dc.contributor.imecauthor | Stucchi, Michele | |
| dc.contributor.imecauthor | De Meyer, Kristin | |
| dc.contributor.imecauthor | Dehaene, Wim | |
| dc.date.accessioned | 2021-10-18T17:33:40Z | |
| dc.date.available | 2021-10-18T17:33:40Z | |
| dc.date.issued | 2010 | |
| dc.identifier.issn | 0741-3106 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/17355 | |
| dc.source.beginpage | 549 | |
| dc.source.endpage | 551 | |
| dc.source.issue | 6 | |
| dc.source.journal | IEEE Electron Device Letters | |
| dc.source.volume | 31 | |
| dc.title | Capacitance reduction technique for through silicon via (TSV) in p-Si substrate | |
| dc.type | Journal article | |
| dspace.entity.type | Publication | |
| Files | ||
| Publication available in collections: |