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Thermal Insights of 3-D BS-PDN in Cloud Server SoC Using TCAD Modeling

 
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0002-1087-3433
cris.virtual.orcid#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0003-0680-4969
cris.virtual.orcid#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0002-1435-3275
cris.virtual.orcid0000-0002-9010-0712
cris.virtualsource.department92510db1-91b0-4865-a06f-c3b655429966
cris.virtualsource.departmente13c9def-b3d6-41b7-88bb-edade1126c39
cris.virtualsource.departmente2b142d3-d92c-4859-9ac7-498d018fed07
cris.virtualsource.departmented894ec9-d595-4dd3-943b-8d99244a104d
cris.virtualsource.department1e7f123f-5354-480d-abe4-78f1539d11ff
cris.virtualsource.department38ea90ae-35e6-4a5a-adc3-b0dfab344b5c
cris.virtualsource.orcid92510db1-91b0-4865-a06f-c3b655429966
cris.virtualsource.orcide13c9def-b3d6-41b7-88bb-edade1126c39
cris.virtualsource.orcide2b142d3-d92c-4859-9ac7-498d018fed07
cris.virtualsource.orcided894ec9-d595-4dd3-943b-8d99244a104d
cris.virtualsource.orcid1e7f123f-5354-480d-abe4-78f1539d11ff
cris.virtualsource.orcid38ea90ae-35e6-4a5a-adc3-b0dfab344b5c
dc.contributor.authorKumar, Nitish
dc.contributor.authorMishra, Subrat
dc.contributor.authorOprins, Herman
dc.contributor.authorMyers, James
dc.contributor.authorRyckaert, Julien
dc.contributor.authorWoltgens, Pieter
dc.contributor.authorBiswas, Dwaipayan
dc.date.accessioned2026-07-16T14:06:46Z
dc.date.available2026-07-16T14:06:46Z
dc.date.createdwos2026
dc.date.issued2026
dc.description.abstractIn this brief, the thermal performance of a large-scale cloud server system-on-chip (SoC) with the backside power delivery network (BS-PDN) and 3-D integration in memory-on-logic (MoL)/logic-on-memory (LoM) configuration with 2.5-D packaging is analyzed in advanced A10 nanosheet technology node using Sentaurus TCAD platform. The results show a 45.6% (~20.3 K) thermal penalty for the 80-core SoC in MoL with BS-PDN compared with the 2-D-baseline frontside PDN (FS-PDN), using a heatsink with forced cooling. A nonuniform power map further aggravates thermal concerns, which can be mitigated using an LoM configuration with BS-PDN, reducing the penalty to 22% (~15 K). Extending the study to a 320-core SoC, in conjunction with an advanced cooling system, LoM with BS-PDN shows 45.3% (~29 K) lower temperature than conventional MoL BS-PDN. The modeling results provide valuable insights and motivate future research into packaging and cooling techniques for BS-PDN integration.
dc.identifier.doi10.1109/tvlsi.2026.3673227
dc.identifier.eissn1557-9999
dc.identifier.issn1063-8210
dc.identifier.issn1557-9999
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/59897
dc.language.isoeng
dc.provenance.editstepusergreet.vanhoof@imec.be
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.source.beginpage2005
dc.source.endpage2009
dc.source.issue6
dc.source.journalIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
dc.source.numberofpages5
dc.source.volume34
dc.title

Thermal Insights of 3-D BS-PDN in Cloud Server SoC Using TCAD Modeling

dc.typeJournal article
dspace.entity.typePublication
imec.internal.crawledAt2026-03-31
imec.internal.sourcecrawler
imec.internal.wosCreatedAt2026-07-14
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