Publication:
A new scalable self-aligned dual-bit split-gate charge trapping memory device
Date
| dc.contributor.author | Breuil, Laurent | |
| dc.contributor.author | Haspeslagh, Luc | |
| dc.contributor.author | Blomme, Pieter | |
| dc.contributor.author | Wellekens, Dirk | |
| dc.contributor.author | De Vos, Joeri | |
| dc.contributor.author | Lorenzini, Martino | |
| dc.contributor.author | Van Houdt, Jan | |
| dc.contributor.imecauthor | Breuil, Laurent | |
| dc.contributor.imecauthor | Haspeslagh, Luc | |
| dc.contributor.imecauthor | Blomme, Pieter | |
| dc.contributor.imecauthor | Wellekens, Dirk | |
| dc.contributor.imecauthor | De Vos, Joeri | |
| dc.contributor.imecauthor | Van Houdt, Jan | |
| dc.contributor.orcidimec | Breuil, Laurent::0000-0003-2869-1651 | |
| dc.contributor.orcidimec | De Vos, Joeri::0000-0002-9332-9336 | |
| dc.contributor.orcidimec | Van Houdt, Jan::0000-0003-1381-6925 | |
| dc.date.accessioned | 2021-10-16T00:50:13Z | |
| dc.date.available | 2021-10-16T00:50:13Z | |
| dc.date.issued | 2005 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/10151 | |
| dc.source.beginpage | 2250 | |
| dc.source.endpage | 2257 | |
| dc.source.issue | 10 | |
| dc.source.journal | IEEE Trans. Electron Devices | |
| dc.source.volume | 52 | |
| dc.title | A new scalable self-aligned dual-bit split-gate charge trapping memory device | |
| dc.type | Journal article | |
| dspace.entity.type | Publication | |
| Files | ||
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