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Dielectric reliability of highly scaled through silicon via for wafer level 3D-SoC applications

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dc.contributor.authorLi, Yunlong
dc.contributor.authorVan Huylenbroeck, Stefaan
dc.contributor.authorDe Vos, Joeri
dc.contributor.authorWu, Chen
dc.contributor.authorStucchi, Michele
dc.contributor.authorCroes, Kristof
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorBeyer, Gerald
dc.contributor.authorBeyne, Eric
dc.contributor.imecauthorLi, Yunlong
dc.contributor.imecauthorVan Huylenbroeck, Stefaan
dc.contributor.imecauthorDe Vos, Joeri
dc.contributor.imecauthorWu, Chen
dc.contributor.imecauthorStucchi, Michele
dc.contributor.imecauthorCroes, Kristof
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.imecauthorBeyer, Gerald
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecLi, Yunlong::0000-0003-4791-4013
dc.contributor.orcidimecVan Huylenbroeck, Stefaan::0000-0001-9978-3575
dc.contributor.orcidimecDe Vos, Joeri::0000-0002-9332-9336
dc.contributor.orcidimecWu, Chen::0000-0002-4636-8842
dc.contributor.orcidimecCroes, Kristof::0000-0002-3955-0638
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.date.accessioned2021-10-25T22:03:37Z
dc.date.available2021-10-25T22:03:37Z
dc.date.issued2018
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/31183
dc.source.conferenceAdvanced Metallization Conference 2018, 28th Asian session (ADMETAPlus 2018)
dc.source.conferencedate10/10/2018
dc.source.conferencelocationBeijing China
dc.title

Dielectric reliability of highly scaled through silicon via for wafer level 3D-SoC applications

dc.typeMeeting abstract
dspace.entity.typePublication
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