Publication:
Energy/area/delay trade-offs in the physical design of on-chip segmented buses architecture
Date
| dc.contributor.author | Guo, Jin | |
| dc.contributor.author | Papanikolaou, Antonis | |
| dc.contributor.author | Hao, Zhang | |
| dc.contributor.author | Catthoor, Francky | |
| dc.contributor.imecauthor | Catthoor, Francky | |
| dc.contributor.orcidimec | Catthoor, Francky::0000-0002-3599-8515 | |
| dc.date.accessioned | 2021-10-16T16:25:51Z | |
| dc.date.available | 2021-10-16T16:25:51Z | |
| dc.date.issued | 2007-08 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/12237 | |
| dc.source.beginpage | 941 | |
| dc.source.endpage | 944 | |
| dc.source.issue | 8 | |
| dc.source.journal | IEEE Trans. on Very Large Scale Integration (VLSI) Systems | |
| dc.source.volume | 15 | |
| dc.title | Energy/area/delay trade-offs in the physical design of on-chip segmented buses architecture | |
| dc.type | Journal article | |
| dspace.entity.type | Publication | |
| Files | ||
| Publication available in collections: |