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Energy filtering in silicon nanowires with a geometric superlattice for steep-slope transistors

Date

2018
Journal article
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dc.contributor.authorBeckers, Arnout
dc.contributor.authorThewissen, Maarten
dc.contributor.authorSoree, Bart
dc.contributor.imecauthorBeckers, Arnout
dc.contributor.imecauthorSoree, Bart
dc.contributor.orcidimecBeckers, Arnout::0000-0003-3663-0824
dc.contributor.orcidimecSoree, Bart::0000-0002-4157-1956
dc.date.accessioned2021-10-25T16:41:30Z
dc.date.available2021-10-25T16:41:30Z
dc.date.embargo9999-12-31
dc.date.issued2018
dc.identifier.issn0021-8979
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/30223
dc.identifier.urlhttps://doi.org/10.1063/1.5043543
dc.source.beginpage144304
dc.source.issue14
dc.source.journalJournal of Applied Physics
dc.source.volume124
dc.title

Energy filtering in silicon nanowires with a geometric superlattice for steep-slope transistors

dc.typeJournal article
dspace.entity.typePublication
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