Publication:
Die-wrapper optimization for 3D stacked ICs
Date
| dc.contributor.author | Noia, Brandon | |
| dc.contributor.author | Chakrabarty, Krishnendu | |
| dc.contributor.author | Marinissen, Erik Jan | |
| dc.contributor.imecauthor | Marinissen, Erik Jan | |
| dc.contributor.orcidimec | Marinissen, Erik Jan::0000-0002-5058-8303 | |
| dc.date.accessioned | 2021-10-18T19:39:10Z | |
| dc.date.available | 2021-10-18T19:39:10Z | |
| dc.date.issued | 2010 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/17706 | |
| dc.source.conference | IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits - 3D-TEST | |
| dc.source.conferencedate | 4/11/2010 | |
| dc.source.conferencelocation | Austin, TX USA | |
| dc.title | Die-wrapper optimization for 3D stacked ICs | |
| dc.type | Oral presentation | |
| dspace.entity.type | Publication | |
| Files | ||
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