Publication:

A Survey on Memory-centric Computer Architectures

Date

2022
Journal article
https://doi.org/10.1145/3544974
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dc.contributor.authorGebregiorgis, Anteneh
dc.contributor.authorHoang Anh Du Nguyen
dc.contributor.authorYu, Jintao
dc.contributor.authorBishnoi, Rajendra
dc.contributor.authorTaouil, Mottaqiallah
dc.contributor.authorCatthoor, Francky
dc.contributor.authorHamdioui, Said
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.date.accessioned2023-01-24T09:15:55Z
dc.date.available2022-11-28T03:11:39Z
dc.date.available2023-01-24T09:15:55Z
dc.date.embargo2022-10-25
dc.date.issued2022
dc.description.wosFundingTextThe work presented in this article is part of the project "Computation-in-memory architecture based on resistive devices" (MNEMOSENE), which has received funding from the European Union's Horizon 2020 research and innovation programme under grant agreement No 780215.
dc.identifier.doi10.1145/3544974
dc.identifier.issn1550-4832
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/40791
dc.publisherASSOC COMPUTING MACHINERY
dc.source.beginpageArt. 79
dc.source.endpagena
dc.source.issue4
dc.source.journalACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS
dc.source.numberofpages50
dc.source.volume18
dc.subject.keywordsEMBEDDED DRAM DEVELOPMENT
dc.subject.keywordsRANDOM-ACCESS MEMORY
dc.subject.keywordsTECHNOLOGY
dc.subject.keywordsMEMRISTOR
dc.subject.keywordsLOGIC
dc.subject.keywordsDESIGN
dc.subject.keywordsBENCHMARK
dc.subject.keywordsCHIP
dc.subject.keywordsIMPLEMENTATION
dc.subject.keywordsOPERATIONS
dc.title

A Survey on Memory-centric Computer Architectures

dc.typeJournal article
dspace.entity.typePublication
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