A 12mW 10 GHz FMCW PLL based on an integrating DAC with 28 kHz rms-frequency-error for 23 MHz/ s slope and 1.2 GHz chirp-bandwidth

Publication:

2020

Journal article

Author(s)

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IEEE Journal of Solid-State Circuits

2025 since deposited on 2021-10-29

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Acq. date: 2026-04-06